In recent years, as semiconductor devices (semiconductor integrated circuits) such as large-scale integrations (LSIs) are increased in speeds and sizes, reduction of power consumption in the semiconductor devices becomes a big problem. In the semiconductor devices, if a load capacity is C, a power supply voltage is V, and an operating frequency is F, generally, a power consumption P of the semiconductor devices is expressed as P=C×V2×F.
In view of the above, techniques for reducing power consumption of semiconductor devices have been applied to high-speed processors and various semiconductor devices are required to reduce their power consumption to low. The techniques are performed by dividing a chip into a plurality of power source blocks and controlling operating voltages and operating frequencies of the power source blocks.
The techniques for reducing the power consumption include a technique called a dynamic voltage frequency scaling (DVFS) that dynamically changes operating voltages and operating frequencies to a particular block, and a power gating control technique that controls on/off of power supply to a particular block.
However, to the particular block, if the power supply on/off control, the changing control of the operating voltages, the changing control of the operating frequencies, and the on/off control relating to the operating frequency are performed, noise can be generated in the power source or a ground in the semiconductor device, or the voltage can be temporarily decreased (for example, see FIG. 13). Further, in a normal operation where the operating voltage and the operating frequency are constant, due to simultaneous switching output noise (SSO noise) in changing outputs such as input/output (I/O) cells (input/output circuits) at once or the like, noise can be generated in the power source or the ground in the semiconductor device.
The power-supply noise or the temporary voltage reduction in the semiconductor device can affect the operation of the semiconductor device and may cause malfunction. Especially, in the semiconductor devices that have the chip divided into power source blocks, capacity of each power source block is small. Accordingly, the semiconductor devices are easily affected by the power-supply noise and the temporary voltage reduction.
For example, the malfunction in the semiconductor devices caused by large-amplitude noise in the power source or the ground or temporary voltage reduction includes destruction of data stored in a register or a memory, and timing error generation. Further, a phase locked loop (PLL) may be unlocked and supply clocks may transiently become unexpectedly high frequencies. Then, the semiconductor devices become unstable and can cause malfunction.
FIG. 13 is a view illustrating an example of inner voltage variation in a semiconductor device. In FIG. 13, the horizontal axis denotes time, CLK denotes clocks supplied to a CPU, CPUV denotes voltage levels of a power source block that includes the CPU, and OCBV denotes voltage levels of the power source block that includes an on-chip bus. For example, as illustrated in FIG. 13, if a frequency (operating frequency) of a clock to be supplied to the CPU is suddenly changed, as shown in a part surrounded by an ellipse 131 of a dotted line, power-supply noise or temporary voltage reduction is generated. Then, if data is being transferred between the CPU and the on-chip bus, a timing error may be generated and may cause malfunction.
In view of the above, to prevent the semiconductor device from being affected or to soften the ill effect, it is necessary to provide means for providing a hardware monitor circuit for monitoring an operation state in the semiconductor device. If the operation state becomes worse, the means prevents malfunction and if the malfunction occurs, the means recovers the semiconductor device.
As one example of the means, it is proposed a technique for performing a power-supply voltage control corresponding to change in internal temperature or process variation in a monitor circuit using a ring oscillator. However, in monitoring the operation state using the ring oscillator, if a predetermined period for measuring a count value using the ring oscillator has not passed, it is not possible to determine the operation state of the semiconductor device. Accordingly, for example, it is difficult to immediately correspond to the change in the operation state due to a sudden operation deterioration factor such as power-supply noise, temporary voltage reduction, or the like.
As techniques to detect such a sudden deterioration in the operation environment, it is proposed a method for determining the sudden deterioration based on whether a test circuit that has a predetermined delay value in a particular clock cycle operates or not (for example, see Japanese Laid-open Patent Publication No. 2002-190747 and Japanese Laid-open Patent Publication No. 2006-4338). However, for the semiconductor devices that have the chip divided into the power source blocks, appropriate methods for detecting malfunction occurred between the power source blocks or the like due to power-supply noise, temporary voltage reduction, or the like at a high speed have been desired.